Advantages
- More Total Cores: 22 (10 vs 22)
- Higher Technology: 14 nm (22 nm vs 14 nm)
- Higher Memory Type: DDR4 1600/1866/2133/2400 (DDR3 vs DDR4 1600/1866/2133/2400)
- Newer Launch Date: January 2016 (November 2014 vs January 2016)
Basic
Intel
Label Name
Intel
November 2014
Launch Date
January 2016
Server
Platform
Server
Xeon E5-2666 v3
Model Name
E5-2699V4
Haswell-EP
Code Name
Broadwell
Intel
Foundry
-
Xeon E5 (Haswell-EP)
Generation
-
CPU Specifications
10
Total Cores
Cores is a hardware term that describes the number of independent central processing units in a single computing component (die or chip).
22
20
Total Threads
44
-
Basic Frequency
2.20 GHz
-
Intel Virtualization Technology (VT-x)
Yes
-
Intel Virtualization Technology for Directed I/O (VT-d)
Yes
-
Max Turbo Frequency
3.60 GHz
2.9 GHz
Performance-core Base Frequency
-
3.5 GHz
Performance-core Max Turbo Frequency
-
-
Enhanced Intel SpeedStep Technology
Yes
-
Intel Hyper-Threading Technology
Yes
-
Intel Turbo Boost Technology
2.0
-
Intel Turbo Boost Technology 2.0 Frequency
3.60 GHz
64K per core
L1 Cache
-
256K per core
L2 Cache
-
25MB shared
L3 Cache
-
100MHz
Bus Frequency
-
-
Cache
55 MB Intel® Smart Cache
Intel Socket 2011-3
CPU Socket
The socket is the component that provides the mechanical and electrical connections between the processor and motherboard.
FCLGA2011
29.0
Multiplier
-
No
Unlocked Multiplier
-
-
Intel AES New Instructions
Yes
22 nm
Technology
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
14 nm
135 W
TDP
145 W
-
PCI Express Version
PCI Express Revision is the supported version of the PCI Express standard. Peripheral Component Interconnect Express (or PCIe) is a high-speed serial computer expansion bus standard for attaching hardware devices to a computer. The different PCI Express versions support different data rates.
3.0
3
PCIe Version
PCI Express is a high-speed serial computer expansion bus standard used for connecting high-speed components, replacing older standards such as AGP, PCI, and PCI-X. It has gone through multiple revisions and improvements since its initial release. PCIe 1.0 was first introduced in 2002, and in order to meet the growing demand for higher bandwidth, subsequent versions have been released over time.
-
-
Max Number of PCI Express Lanes
A PCI Express (PCIe) lane consists of two differential signaling pairs, one for receiving data, one for transmitting data, and is the basic unit of the PCIe bus. Max # of PCI Express Lanes is the total number of supported lanes.
40
-
Instruction Set
An instruction set architecture (ISA) defines the instructions a processor can execute. Common architectures include x86-64, ARM and RISC-V. The ISA determines software compatibility, while optional instruction extensions add specialized capabilities.
64-bit
-
Intel 64
Yes
-
Intel VT-x with Extended Page Tables (EPT)
Yes
-
PCI Express Configurations
PCI Express (PCIe) Configurations describe the available PCIe lane configurations that can be used to link to PCIe devices.
x4 | x8 | x16
2.6 billions
Transistor Count
-
Memory Specifications
DDR3
Memory Type
DDR4 1600/1866/2133/2400
-
Max Memory Size
Max memory size refers to the maximum memory capacity supported by the processor.
1.5 TB
4
Memory Channels
The number of memory channels refers to the bandwidth operation for real world application.
4
-
Bus Speed
9.6 GT/s
-
Max Memory Bandwidth
Max Memory bandwidth is the maximum rate at which data can be read from or stored into a semiconductor memory by the processor (in GB/s).
76.8 GB/s
Yes
ECC Memory Support
ECC Memory Supported indicates processor support for Error-Correcting Code memory. ECC memory is a type of system memory that can detect and correct common kinds of internal data corruption. Note that ECC memory support requires both processor and chipset support.
Yes
-
Intel Flex Memory Access
No
Interfaces and Ports
40
PCIe Lanes
-
Miscellaneous
-
Intel Standard Manageability (ISM)
Intel® AVX2
-
Execute Disable Bit
Execute Disable Bit is a hardware-based security feature that can reduce exposure to viruses and malicious-code attacks and prevent harmful software from executing and propagating on the server or network.
Yes
-
Intel OS Guard
Yes
Benchmarks
Geekbench 6 Single Core
Xeon E5-2666 v3
1046
Xeon E5-2699 v4
1118
+7%
Geekbench 6 Multi Core
Xeon E5-2666 v3
6173
Xeon E5-2699 v4
8057
+31%
Geekbench 5 Single Core
Xeon E5-2666 v3
785
+10%
Xeon E5-2699 v4
711
Geekbench 5 Multi Core
Xeon E5-2666 v3
5608
Xeon E5-2699 v4
9423
+68%
Passmark CPU Single Core
Xeon E5-2666 v3
1983
+2%
Xeon E5-2699 v4
1948
Passmark CPU Multi Core
Xeon E5-2666 v3
14346
Xeon E5-2699 v4
25250
+76%
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